The present invention relates to an arc interpolation system for a numerical control system, in particular, relates to an arc interpolating system which calculates the next interpolation coordinates according to the present coordinates and a specified length.
A prior art interpolation circuit using the DDA (Digital Differential Analyzer) principle is shown in FIG. 1, in which an arc in the first quandrant is traced in the clock-wise direction. In FIG. 1, the reference numeral 1 is the input circuit, 2 is the X-register for storing the length of the X-component between the center of the arc and the initial point of the arc, 3 is the Y-register for storing the vertical length of the Y-component between the center of the arc and the initial point of the arc. 4 is the radius register, 5 is the feed speed register, 6 is the pulse generator, 9 is the summand register of the X-axis, 10 is the summand register of the Y-axis, 13 is the remainder register for storing the remainder (the less significant digits of the calculation) of the X-axis generated in the calculation, 14 is the remainder register for the Y-axis, and 15 and 16 are the motor drive circuits for the X-axis and the Y-axis, respectively.
At first, the input circuit 1 provides the value IX.sub.O which is the horizontal length between the center of the arc and the initial point of the arc to the register 2, the value IY.sub.O, which is the vertical length between the center of the arc to the initial point of the arc, to the register 3, the radius (r) to the register 4, and the feed speed value (F) to the register 5. The pulse generator 6 generates a pulse train the frequency of which is 2.sup.m F/r according to the outputs of the registers 4 and 5. It is supposed that 2.sup.m .gtoreq.r is satisfied, and 2.sup.m may be either a constant or the function of the radius (r). The constant (IX.sub.n) of the register 2 is transferred to the register 9 and the content (IY.sub.n) of the register 3 is transferred to the register 10 by the output pulse of the pulse generator 6. It should be appreciated that the initial value of the register 2 is IX.sub.O and the initial value of the register 3 is IY.sub.O, and the initial value of the registers 13 and 14 is zero. The content (IY.sub.n) of the register 10 and the content (RX.sub.n) are added, and the less significant m bits (RX.sub.n+1) of the addition ((RX.sub.n +IY.sub.n)/2.sup.m) are restored in the register 13, and the overflow bit of said addition ((RX.sub.n +IY.sub.n)/2.sup.m) is applied to the motor drive circuit 15 to drive the motor in the X-axis direction, and also said overflow bit is added to the content (IX.sub.n) of the register 2 and the sum (IX.sub.n+1) of the addition is restored in the register 2. Similarly, the content (IX.sub.n) of the register 9 and the content (RY.sub.n) of the register 14 are added and the less significant m bits (RY.sub.n+1) of the sum of the addition ((RY.sub.n +IX.sub.n)/2.sup.m) are restored in the register 14, and the overflow bit of the sum of the addition ((RY.sub.n +IX.sub.n)/2.sup.m) is applied to the motor drive circuit 15 to drive the motor in the Y-axis direction, and also said overflow bit is subtracted from the content (IY.sub.n) of the register 3, and the difference is restored in the register 3. The above calculations are repeated to trace the arc, thus the asymptotic formula is shown below. EQU IX.sub.n+1 +RX.sub.n+1 /2.sup.m =IX.sub.n +(RX.sub.n +IY.sub.n)/2.sup.m ( 1) EQU IY.sub.n+1 -RY.sub.n+1 /2.sup.m =IY.sub.n -(RY.sub.n +IX.sub.n)/2.sup.m ( 2)
In the above formula, it should be appreciated that IX.sub.n and IY.sub.n are the vector in the radius direction.
The disadvantage of the above prior art is that the calculation must be finished during a single period of the pulse train from the pulse generator 6, and when the circuit element is slow in operation, the frequency of the pulse generator 6 must be low resulting the low feed speed (F).